Vhdl ams egypte jobs
I am in need of an experienced Amazon account manager to help me with managing my Amazon Seller Central account. The ideal candidate should have expertise with managing Amazon Seller Central and be able to optimize product listings to drive sales. Additionally, I would like help with advertising and marketing on Amazon to increase visibility and conversions. The ideal candidate should...manager to help me with managing my Amazon Seller Central account. The ideal candidate should have expertise with managing Amazon Seller Central and be able to optimize product listings to drive sales. Additionally, I would like help with advertising and marketing on Amazon to increase visibility and conversions. The ideal candidate should have experience with Amazon PPC, Sponsored Products, and AMS ...
We are looking for a skilled developer to create a webpage for code generation. The ideal candidate should have experience in web application, web design, and web development. The webpage will be used to generate VHDL modules for FPGA. The user will input certain parameters, and the webpage will output the corresponding code. The interface needs to be user-friendly and easy to navigate. We want to be able to add new modules, and the background code generator is already developed by us (Tcl scripts). The candidate shall propose a way to interface between the webpage and the Tcl script that generates the code. To apply for the position, please submit a detailed proposal outlining your experience and how you can help with the project. Please include links to past completed projects ...
We need support for TCL scripting, FPGA projects. Tcl sripts will be used to compile and simulate VHDL code, synthesize, P&R and analyze reports
Campera Electronic Systems is planning to introduce a Verification methodology in the company verification flow for VHDL designs. Previous experience on one of the "standard" VHDL verification methodologies (UVVM, OSVVM) or framework (Vunit) is requied.
I am seeking a VHDL expert to help me implement a control system using VHDL. The purpose of this project is to implement a control system, and the specific type of control system has not been specified. The ideal candidate will have experience with VHDL and control systems, and be able to work efficiently and accurately. Please provide examples of previous VHDL projects you have worked on.
I am seeking a technical writer and system improvement expert to help me with my project. Specifically, I need help with improving the software aspect of the system which includes C, Vivado, Python, and Ethernet. The ideal candidate should have experience with VHDL and ZedBoard at an intermediate level. The following skills and experience are required for this project: - Technical writing for system documentation - Knowledge of software (C, Vivado, Python, Ethernet) - Intermediate experience with ZedBoard and VHDL If you possess the above skills and experience, please apply for this project.
I am seeking a VHDL expert to help me implement a control system using VHDL. The purpose of this project is to implement a control system, and the specific type of control system has not been specified. The ideal candidate will have experience with VHDL and control systems, and be able to work efficiently and accurately. Please provide examples of previous VHDL projects you have worked on.
Hi Wen J., I noticed your profile and would like to offer you my project. We can discuss any details over chat.
I am looking for an experienced Verilog or VHDL engineer to help me explain and design Number theoretic transform (NTT) which is the most efficient method for multiplying two polynomials of high degree with integer coefficients, using FPGA. The project has specific requirements and I will provide detailed specifications. The desired implementation platform is Xilinx FPGA using Vivado and the deadline for the project is 1-2 weeks. Ideal skills and experience for the job include Verilog or VHDL programming, FPGA design, and NTT knowledge.
how to program a microcontroller to read the room temperature from a sensor and control a DC motor, which is connected to a fan and also required to design a random access memory device in VHDL for the microcontroller.
Implementation of a Moore finite state machine with 2 - 4 D-FlipFlops simulating a control system. Design.v and testbench.v needed.
We are seeking a VHDL FPGA programmer to develop a program for data encryption and decryption with a high level of security. The ideal candidate should have experience in VHDL programming, FPGA design, and encryption/decryption algorithms. Functionality: - The program should provide high-security data encryption/decryption that meets the client's requirements. Encryption/Decryption algorithms: - The client needs suggestions for encryption/decryption algorithms that meet their high-security requirements. The ideal candidate should have experience in suggesting and implementing secure encryption/decryption algorithms. Level of security: - The client requires a high level of security for the encryption/decryption process. The ideal candidate should have experience i...
I am looking for an experienced freelancer to work on an FPGA based project. The main goal of this project is performance optimization, and I am looking for someone with experience using the Xilinx platform, and coding in VHDL. I am looking for someone who can ensure that the project turns out as expected and meets all my requirements. Additionally, I would like the outcome of this project to have a positive impact on my organization's performance. The freelancer I choose must have in-depth and up-to-date knowledge of the FPGA architecture as well as memory control, interfaces, and system design. He/she should also possess excellent programming experience and be able to provide detailed reports and documentation in a timely manner. Moreover, I need assurance that this project...
Expand on the design of a single-cycle RV32I processor core called Archer, which implements most instructions of the RV32I base integer instruction set. Your the task will be to pipeline the processor and add hardware support for data forwarding and hazard detection.
Build AMS Planning model in Python, PowerBI, or any other tool to deliver the required results in the shortest possible timeframe
Project for a simple security system design in System Verilog code, design and testbench.
...individual who successfully secures the appointment. As there are only a few appointments released every 1-2 days, you may need to try multiple times. ***IMPORTANT: Please begin attempting to book the appointment immediately, and send me proof of success if you manage to secure a booking. I will award you AFTER you successfully booked an appointment. Instructions: Visit Change the language to EN (English) Select "Book Appointment" Tick the checkbox and click "Next" Select "Iran" as the citizenship Choose "one person" for the number of applicants For the question about living in Berlin with family, select "No" Select "Apply for a residence title" Opt for "Economic activity" Choose "EU Blue Card" Click &qu...
I have a task in VHDL looking for VHDL code to control Epson printhead.
I'm looking for a VHDL 1st-in 1st-out (FIFO) project to be completed. I need a Verilog code to complete the FIFO example. Also, syntax is very important, therefore, I am attaching an example (LIFO) to illustrate the syntax.
I need to use GitLab CI to check for students' work assignment (language VHDL (run with GHDL) if that matters). The idea is that I have a "secret" testbench, which is compiled with student's code (submitted as git commit to GitLab), and the job needs to check if the submission passes the test. There must be zero possibility for the student to misuse the GitLab to get access to the secret code. Preferably the secret code is stored and run in a separate computer (than gitlab-runner). Deliverables: - Description how the objectives are met - Installation instructions (if any) - Example project with CI pipeline - Source codes of customized scripts / code (C or C++ allowed). Please note: - GitLab CI allows to run arbitrary code in the CI-job, thus the student wi...
Campera Electronic Systems is planning to introduce a Verification methodology in the company verification flow for VHDL designs. Previous experience on one of the "standard" VHDL verification methodologies (UVVM, OSVVM) or framework (Vunit) is requied.
...a project in the labs during the 9th to 13th week of the semester. The practical demonstration will take place last week. Using BUT e-learning, students submit a link to the GitHub repository, which contains the project in Vivado, the necessary images, documents and a descriptive README file. The submission deadline is the day before the demonstration. The FPGA source codes must be written in VHDL and implementable on the Nexys A7-50T board in the development tools used in the laboratory during the semester. Make testbenches for all your new components. Physical implementation on FPGA is necessary, computer simulation is not sufficient. Never, ever use rising_edge or falling_edge to test edges of non-clock signals under any circumstances! In a synchronous process, the first...
I'm looking for an expert in VHDL and Quartus II from Pakistan to design a specific digital system of intermediate complexity. The ideal freelancer will have experience in designing digital systems using VHDL and Quartus II.
I need a code in VHDL for a custom IP to communicate with the DDR4 MIG, it can be through a DMA block with FIFO over the AXI bus. Everything must be done on the PL side, and must have the basic functions of writing and reading a data at a memory address. The code will be tested on the ZCU104.
This is a project where you will use a DE 10 Standard Board to detect audio data. It should detect snaps and under instructions, look at ideas in the instruction areas, there are highlighted other functions there. The files and everything else necessary to complete to complete the poject are in this google drive. Thank you.
using Artix 7 implement Master UFS protocol design for the UFS Host device, Feel free to contact who's have experince on Stroage's(emmc, ufs, nand e.t.c) Skills required : Verilog , VHDL , C
The Delaware Nurses Association is a non-profit, small business with an existing AMS system that includes a "plug and play" website developer. We are overall very happy with our system, website, and more. However, there is opportunity to update the content within our main web pages and we are hoping to do this with some custom HTML code that gives webpages a simpler, engaging look and feel. The webpage layouts and "gadgets" would contain custom HTML code. Once built, the HTML code should be able to be easily updated (text, links, photos, etc.).
I'm looking for an experienced freelancer to help with the integration of Salesforce with AMS 360/ Cloud Integration. I have an existing Salesforce instance that I need integrating in order to make full use of the AMS 360/ Cloud Integration feature. I need help specifically with Sales Cloud. There are some specific integration requirements that I need assistance with, so an experienced developer is essential. The ideal freelancer will be familiar with Salesforce and Cloud Integration, as well as all its features and must be knowledgeable about how to go about the integration process. Ideally, they will also be able to advise on the best way to go about the integration based on my requirements. If you have experience in this sort of project and think you'd ...
Responsibilities: - Bid and place campaigns within various digital platforms (ie: Facebook, Pinterest, Google, etc.) - Manage the ongoing real-time optimization of live media. - Ensure campaigns are pacing according to the media plan by monitoring performance and making changes when necessary. - Manage campaign budget across various p...3+ months - Individuals only, no agencies - 2+ years of experience buying media on Facebook/Instagram. - You have a proven record of managing multiple projects at once. - You have the ability to stay highly organized and efficient in a fast-paced, high-energy environment. Bonus if you’ve bought media on the following platforms: - Social: Twitter, Snapchat, Pinterest, LinkedIn, TikTok - Amazon (AMS, Amazon DSP, AMG) - Digital Audio (Spotify, ...
Embedded Linux with FPGA capability. From VHDL to application level programming.
...e. Liaising with Amazon for missing units. 7. Amazon seller feedback management. a. Maintaining Account health. b. Maintaining positive feedback of above 90%. 8. Inventory planning and forecasting. 9. Inventory Management. a. Making sure the product is available all the time. b. Resolving reserved inventory issues. 10. Making sure listing stays live. 11. Chasing Amazon for cases. 12. Managing AMS (Amazon Marketing services). a. Creating an advert campaign. b. Analyzing ongoing campaigns. c. Planning and forecasting for Advert Expenditure. 13. Reporting and Report Analysis. a. Sales report. b. Returns report. c. Shipment report. d. Profit analysis. e. Inventory report. 14. Managing and fixing pricing errors. a. Making sure our prices are correct all the time so we don’t ...
...e. Liaising with Amazon for missing units. 7. Amazon seller feedback management. a. Maintaining Account health. b. Maintaining positive feedback of above 90%. 8. Inventory planning and forecasting. 9. Inventory Management. a. Making sure the product is available all the time. b. Resolving reserved inventory issues. 10. Making sure listing stays live. 11. Chasing Amazon for cases. 12. Managing AMS (Amazon Marketing services). a. Creating an advert campaign. b. Analyzing ongoing campaigns. c. Planning and forecasting for Advert Expenditure. 13. Reporting and Report Analysis. a. Sales report. b. Returns report. c. Shipment report. d. Profit analysis. e. Inventory report. 14. Managing and fixing pricing errors. a. Making sure our prices are correct all the time so we don’t ...
Looking for FPGA Developer who has experience in VHDL on SoC FPGA architecture
I’m looking for a talented freelancer to help me design a LIN Bus controller FPGA, in VHDL. To be considered for the job, candidates should include past work in their application and provide relevant experience related to this project. Any working code previously developed is a plus. Deadline for the delivery 20th April 2023. A quotation is required, together with the proof of previous expertise of the working code already developed It will be required to 1. deliver VHDL source code for LIN master bus controller 2. testbench with a Verification module, or any other sort of mechanism to emulate a node 3. Integration and testing of a simple test code on hardware provided by us 4. documentation
We are a wholesale of aluminium machinery, specifically selling to the door and window industry. We import, sell and service the machines we bring in. We are currently rebranding from Luna Machinery to Aluminium Machinery Solutions. Writing job Writers produce articles, reports, books and other texts. Writers are paid to write a variety of texts, including books and articles. Depending on the type of work, they can be either employed or freelance. An advertising copywriter , for example, is a type of writer who produces the text for adverts.
...standard 4-20mA inputs. The DD/EDDL/FDI file types of HART device vendors shall be supported. PACTWARE compatible & multiple stackable HATS. The use of pins of RPi must be approved by us. you may use existing dev kits from analog devices, ST, Microchip etc., but ensure the ready availability of main components & get our approval. Please adhere to current standards and all commands, support various AMS systems. Provide a test client in MS Visual Studio also. based on your advice etc. More details about the existing system will be shared with shortlisted persons. This may extend to additional help from you for development, testing etc. also. Submit your questions with your 1st response. All IP will be owned by us. Submit all details, design, gerber files, source code, su...
About Aluminium Machinery Solutions: Wholesaler who sells and services aluminium machinery. Currently rebranding from Luna Machinery to AMS: Aluminium Machinery Solutions. Project Description: We are looking for a modern, minimalist logo design. We want people to be able to tell what we do just by looking at the logo. Perhaps incorporate an aluminium profile or a circular saw blade, into the logo without it being over-the-top.
About AMS; Aluminium Machinery Solutions: We are a wholesale of aluminium machinery, specifically selling to the door and window industry. We import, sell and service the machines we bring in. We are currently rebranding from Luna Machinery to Aluminium Machinery Solutions. Project Description: We are looking for a modern, minimalist logo design. We want people to be able to tell what we do just by looking at the logo. Perhaps incorporate an aluminium profile or a circular saw blade, into the logo without it being over-the-top.
I need someone to pull all the product numbers from each pdf and placed it into excel. Each pdf should be noted in 1 column of excel Column names: Mott, Kewaunee, Hamilton, AMS product numbers shown should match on each column. example excel attached need to fill in the rest.
Europe, Italy timezone preferred. Lead the activity for porting FPGA design to Silicon technology (memory replacement, ...) Carry on simulations...porting FPGA design to Silicon technology (memory replacement, ...) Carry on simulations of the updated RTL design to check that the functionality remains unchanged Execute static and formal verification of RTL code using appropriate tools Run trial synthesis on the RTL design and check the timing violations Lead the activities for SoC sub-block Static Timing Analysis. Required Skills (expert): VHDL language Digital ASIC design flow Use of digital simulations with standard industry simulators (Mentor QuestaCore) Static and formal RTL verification (e.g. Synopsys Spyglass) Synthesis tools (e.g. Cadence Genus) UVM and System Verilog test...
Smart law firm, expansion of I need someone able to cover the entire project (Logo, Visual ID and website), with a "western" taste. 2 weeks timeframe
Program the Basys 3 using the Cordic IP Integrator to generate: the hyperbolic sine and hyperbolic cosine of an angle parameters: You must enter the angle in degrees using the switches, so that the vhdl code includes its respective conversion to radians. This angle should be shown on the 7 segment displays. Pressing btnu the displays should then show the (hyperbolic sine) of the entered angle, and pressing btnd should show the (hyperbolic sine) of the angle.
The company is searching for external collaborators to design and test a Video test pattern generator in VHDL. The module shall be configurable for different pixel bit, num,ber of pixel per clock, different pattern generated, resolution, frame rate, colour format, video output sequence
we are looking for azure function developer who can write couple of functions to pull contents from AMS and also provide a URL to access the contents of AMS. this URL will directly execute the contents.
Current requirement for SP/CDP modules Job description Senior SuccessFactors SP/CDP modules consultant for greenfield (SAP best practices) implementation project Requirements: 1. Minimum 2-5 years of relevant and strong experience in SAP SuccessFactors - Succession Planning module and Career Development Planning (CDP) in Greenfield implementation, Rollout and AMS projects 2. Any Graduate/Post Graduate eligible 3. SAP SuccessFactors 2H delta/1H delta Active certifications in Succession Planning and Career Development Planning 4. Deep knowledge of the two modules with the ability to understand the competency library structure for the client 5. Good understanding of the Performance and Goals process 6. Good understanding of the common integration points between SP/CDP and other Su...
1)Using VHDL and the Xilinx Vivado Tools, design and implement a 4-bit ALU whose functionality is compliant with the TTL MSI 74LS381A specifications. The design must use a VHDL behavioral modeling coding style and can include concurrent and sequential statement types. Source code modules must include liberal commenting to clarify and explain function and operation your code. 2) Create a test bench VHDL module and use the Vivado Simulator to test/verify proper operation of the ALU’s functions with all input data patterns specified in the 74LS381A functional table. Recommendation: to make comparison of simulated results to those listed in the functional table easier, apply the external stimulus input patterns in the same “row” order as inputs are listed...
I want someone who understands FPGA, Vivado, Verilog, VHDL etc for a report
