Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

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    12 jobs found, pricing in CAD

    Micro-controoler Application on Terasic DE10-Lite, FPGA board

    $53 (Avg Bid)
    $53 Avg Bid
    3 bids

    finite-state synchronous machines mealy and moore machine for given task.

    $196 (Avg Bid)
    $196 Avg Bid
    15 bids

    Need to investigate the latches, flip-flops and the registers in VHDL laboratory work

    $101 (Avg Bid)
    $101 Avg Bid
    7 bids

    digital Alarm clock. I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    $110 (Avg Bid)
    $110 Avg Bid
    7 bids

    I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.

    $37 (Avg Bid)
    $37 Avg Bid
    7 bids

    This Project is to investigate latches, flip-flops and registers. VHDL -- Quartus Prime Lite 18.1 Quartus.

    $19 (Avg Bid)
    $19 Avg Bid
    2 bids

    The first installment of the project dealt with the capability to simulate the actions of four very simple gate types, an INV gate, an AND gate, an OR gate and an XOR (exclusive or) gate. The second installment extended that capability by describing the simple logic gates using Verilog, but the Verilog was restricted to descriptions of circuits which only contained a single gate. For the third ins...

    $64 (Avg Bid)
    $64 Avg Bid
    14 bids
    OFDM Waveform Development 4 days left
    VERIFIED

    Need someone to develop OFDM waveform on AD9361 or any other transceiver and FPGA.

    $1368 (Avg Bid)
    $1368 Avg Bid
    8 bids

    hello, please if you can comment out the verilog code and the steps done, so we know how to explain it. also, i need this project to be done in exactly one week from today. thank you

    $72 (Avg Bid)
    $72 Avg Bid
    6 bids
    HEVC implementation 2 days left
    VERIFIED

    anyone having knowledge on HEVC can reach out to me

    $18 / hr (Avg Bid)
    $18 / hr Avg Bid
    3 bids
    Design a circuit in Xilinx 1 day left
    VERIFIED

    Design a circuit in Xilinx that takes these inputs and outputs according to the table below

    $38 (Avg Bid)
    $38 Avg Bid
    8 bids

    Need someone know well vhdl ............................. ............................. .............................

    $41 (Avg Bid)
    $41 Avg Bid
    13 bids