Verilog / VHDL Jobs

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Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

18 jobs found, pricing in CAD

Carry Save Adder Systemverilog 6 days left

Hey, I am looking to implement a carry-save adder in System verilog

Digital Electronics Electronics FPGA Verilog / VHDL

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Needed a VHDL programmer 6 days left

Needed a VHDL programmer having experience with multisim or any vhdl programming software.

C Programming FPGA LabVIEW Microcontroller Verilog / VHDL

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Program a microcontroller 6 days left

I need help programming a microcontroller (PIC16LF1902-I/SS). The micros job is to count the duration of a momentary switch being activated, and compare that time to the stored highest time previously reached on that device. The output screen is a GDC0209 ( , ) The switch is a vibration sensor. I need to current draw to be 400uA when the device is running and displaying the time. Attached is the functional requirements. Please ask me whatever questions you have

Arduino Electrical Engineering Electronics Microcontroller Verilog / VHDL

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MIPS instructions and simple Assembly -- 2 5 days left

MIPS instructions and simple Assembly

Assembly C Programming C++ Programming Verilog / VHDL x86/x64 Assembler

$9 - $27

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$9 - $27

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VHDL code with test bench setup (Convolution Problem) 5 days left

Two 16-bit number from X0 and X9 and H0 to H9 multiply them and add them . Code shall be done in VHDL Y= x0h0+x1h1+x2h2+x3h3+........x9h9. For more details find the attached Set of Question.

Assembly FPGA Verilog / VHDL

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orCAD Software Expert 5 days left

Task1: An audio signal processor has to attenuate a specific range of frequencies in the specified stop band and allowing the frequencies to pass outside the stop band. Design a prototype 4th order active band stop filter and 6th order active band stop filter using Butterworth filter for a desirable resonant frequency and bandwidth as per the given block diagram representation. Task2: In a combinational logic circuit the decoded output depends on the specified combination of bits at the data input. 1) The simulation design should be done for the combinational logic circuit such that it has three input lines and eight output lines. 2) Develop a truth table and the logic symbol for the combinational logic circuit designed.

Electrical Engineering Electronics Microcontroller PCB Layout Verilog / VHDL

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Circuit design 4 days left

Need a circuit integrating multiple simple circuits

Circuit Design Electrical Engineering Electronics Engineering Verilog / VHDL

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Basic calculator using vivado on basys3 fpga 3 days left

To whom it may concern, I'm looking for someone experienced who can develop a basic calculator using verilog on vivado with specific requirements in a short period of time. If you think this fits your skills, let me know and lets discuss things further!

Electrical Engineering Electronics FPGA Matlab and Mathematica Verilog / VHDL

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Dc motor pwm , vhdl using fpga 3 days left

I want code and testbench for Dc motor pwm by vhdl and using fpga Model of fpga kit ( DE10-Lite)

Electronics FPGA Verilog / VHDL

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Need someone good expert in computer architecture -- 2 2 days left

you will be implementing a pipelined MIPS processor datapath with the following features: 1) FDEMW 5-stage pipeline with branch

Assembly C Programming C++ Programming Engineering Verilog / VHDL

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FPGA Project 2 days left

1 Verilog/VHDL Programming language 2 Understanding of the protocol and standards 3 FPGA knowledge & Programming hands on 4 Knowledge of the safety standards. Optical Data link 5 Networking concepts

C Programming Electronics FPGA Microcontroller Verilog / VHDL

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Adder Architecture 2 days left

Need help designing an adder architecture in Verilog/Systemverilog.

Engineering FPGA Verilog / VHDL

$29 (Avg Bid)

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Need someone good expert in computer architecture 1 day left

you will be implementing a pipelined MIPS processor datapath with the following features: 1) FDEMW 5-stage pipeline with branch

Assembly C++ Programming Computer Graphics Engineering Verilog / VHDL

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Image Equalizer 1 day left

I need an image equalizer written in VHDL language. The semplified algorithm to use should be: DELTA_VALUE = MAX_PIXEL_VALUE – MIN_PIXEL_VALUE SHIFT_LEVEL = (8 – FLOOR(LOG2(DELTA_VALUE +1))) TEMP_PIXEL = (CURRENT_PIXEL_VALUE - MIN_PIXEL_VALUE) << SHIFT_LEVEL NEW_PIXEL_VALUE = MIN( 255 , TEMP_PIXEL) In this project the program recieve the image dimension in 2 bytes, the first one is for columns and the second one is for rows. The third byte is the first byte of the image that the program recieves in input. Extra Notes: 1. FLOOR(LOG2(DELTA_VALUE +1)) is an integer number 2. The project should be able to process more than one image, but the input image will never change during the execution, only when the DONE signal is high 3. The module will start processing when the S...

FPGA Verilog / VHDL

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32x32 LED Adafruit matrix driven by FPGA 1 day left

I am using a 32x32 LED matrix from Adafruit and I am driving it with an FPGA. I followed the tutorial they provided and I get an image initialize. Now, I am trying to have various frames to show, to make some sort of video. I want to use a microcontroller to send the data for the frames to the FPGA. Further explanation is attached on the word document and all the files I currently am using will also be attached. Please don't hesitate to reach out with any questions regarding the design.

Arduino Electrical Engineering Electronics Microcontroller Verilog / VHDL

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I need someone to implement a full 5 stage pipeline CPU in RISC-V in Verilog. 10 hours left

For more details, contact me via chat

FPGA FPGA Coding Software Architecture Verilog / VHDL

$260 (Avg Bid)

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Ac voltage measurement circuit 2 hours left

ac voltage measurement circuit and output of this circuit is in adc and send to pic16f877a

Circuit Design Electrical Engineering Electronics Microcontroller Verilog / VHDL

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Design 4 bits arithmetic unit that add, multiply and subtract Ending left

Design 4 bits arithmetic unit that add, multiply and subtract using PTL & Domino *****simulate using cadence***** The app takes 3 inputs A, B, and C A, and B are 4 bits operands C is a 2 bits number (input for a multiplexing circuit) representing the operation Deliverables: 1- a step by step word file of the work done 2- all cadence files

Circuit Design Electrical Engineering Electronics Microcontroller Verilog / VHDL

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