Need to investigate the latches, flip-flops and the registers in VHDL laboratory work
I need it for my final project. Please let me know if anyone can do it in 20$. Lowest bit will be rewarded.
This Project is to investigate latches, flip-flops and registers. VHDL -- Quartus Prime Lite 18.1 Quartus.
The first installment of the project dealt with the capability to simulate the actions of four very simple gate types, an INV gate, an AND gate, an OR gate and an XOR (exclusive or) gate. The second installment extended that capability by describing the simple logic gates using Verilog, but the Verilog was restricted to descriptions of circuits which only contained a single gate. For the third ins...