A question about cache

We have two functions : /* * Sum the array elements, one way. */ long sumA(long *a, int numrows, int numcols) { int i, j; long sum = 0; for (i = 0; i < numrows; i++) for (j = 0; j < numcols; j ++) sum += cache_read(cache, &a[i * numcols + j]); return sum; } /* * Sum the array elements, another way. */ long sumB(long *a, int numrows, int numcols) { int i, j; long sum = 0; for (j = 0; j < numcols; j ++) for (i = 0; i < numrows; i++) sum += cache_read(cache, &a[i * numcols + j]); return sum; } This problem tests your ability to predict the cache behavior of C code. For each of the following caches, array sizes and functions, firrst determine the miss rate using your cache implementation from the previous question (or my reference solution contained in the le cache-reference.o), and then explain how you would have derived the miss rate given only the program code and the characteristics of the cache (that is, using pencil and paper only). Assume that we execute the code under the following conditions:  sizeof(long) = 8  The cache contains 32 blocks; each block is 64 bytes long.  The arrays are stored in row-major order.  The only memory accesses are to the entries of the array a. a. An array of long with 4 rows of 128 columns, a direct-mapped cache, and the function sumA from the program cache-test from question 1. [3] b. An array of long with 4 rows of 128 columns, a direct-mapped cache, and the function sumB from the program cache-test from question 1. [3] c. An array of long with 4 rows of 128 columns, a direct-mapped cache, and the function sumC from the program cache-test from question 1. [3] d. An array of long with 4 rows of 128 columns, a two-way set-associative cache, and the function sumB from the program cache-test from question 1. [3] e. An array of long with 4 rows of 128 columns, a four-way set-associative cache, and the function sumB from the program cache-test from question 1. [3] f. An array of long with 4 rows of 120 columns, a direct-mapped cache, and the function sumB from the program cache-test from question 1. Sample solution should look like : The miss rate is 25%: we are traversing the array by increasing memory address of the elements, and hence every miss is followed by three hits accessing elements that are in the same cache line.