Software Implementation Of Rijndael AES High Throughput 128 bit

Awarded Posted Feb 21, 2016 Paid on delivery
Awarded Paid on delivery

I need to implement a program about Rijndael AES for High Throughput using 128 bit.

Identification of critical design parameters, the finalised partitioning system design together with Register Transfer Level (RTL) VHDL description of the critical modules.

I need to implement full functionable system of this including all parts of Rijndael AES - Subbytes, Shift rows, Mix columns and Add round key

price is still negotiable up to 50GBP. bonus will be awarded to efficiency

Verilog / VHDL

Project ID: #9718996

About the project

6 proposals Remote project Active Feb 23, 2016

6 freelancers are bidding on average £66 for this job

kamranbabarnust2

i can do this task for you. i can do this task for you. i can do this task for you. i can do this task for you. i can do this task for you.

£111 GBP in 2 days
(90 Reviews)
6.2
luffy08

Hello Sir, I have implemented AES in Verilog. I can translate it to VHDL if you need. Please go throught my profile and contact me for more information. I am looking forward to an opportunity to work with you. Thank More

£40 GBP in 3 days
(3 Reviews)
2.4
TechnocracyPune

I am good at VHDL and I am working professional in the same field. Though you can see my feedback are related to MATLAB I am much better in RTL designs. Please send me the reference document to work on this project. Al More

£100 GBP in 5 days
(0 Reviews)
0.0
tamasgy89

A proposal has not yet been provided

£44 GBP in 5 days
(0 Reviews)
0.0