Design for Low power and area efficient carry select adder in Tanner or microwind software

In Progress Posted Jan 13, 2015 Paid on delivery
In Progress Paid on delivery

i want to implement the design for low power and area efficient carry select adder at tanner tool or micro wind software .

Circuit Design Digital Design Electronics FPGA Verilog / VHDL

Project ID: #6972507

About the project

5 proposals Remote project Active Jan 19, 2015

Awarded to:

ee4raja

Hi We have the logic available with tanner tool. Looking forward to discuss with you and deliver it.

₹3000 INR in 1 day
(8 Reviews)
3.9

5 freelancers are bidding on average ₹3066 for this job

dpappu131

A proposal has not yet been provided

₹3333 INR in 2 days
(14 Reviews)
4.2
jinalsheth

Hi, I am an ASIC engineer. I hope i will do it better. More

₹3888 INR in 5 days
(0 Reviews)
0.0
hdlcoders

Hi, I have a very good experience in electronics design using EDA tools,i have worked with many companies in india and abroad.I have finished projects for MS students.

₹2555 INR in 1 day
(0 Reviews)
0.0
adeelamin15

I have done couple of FPGA projects in past. You can visit my portfolio in my profile for its details. For this project I would be requiring some information regarding the implementation: -- I would be using Ver More

₹2555 INR in 5 days
(0 Reviews)
0.0