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rajkot, india
It's currently 12:50 AM here
Joined May 12, 2018
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Imtiyaz J.
@ImtiyazJafrani
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rajkot, india
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Electronics & Communication Engineer
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Experience
Trainee Physical Design Engineer
Jun 2019 - Nov 2019 (5 months, 1 day)
ASIC Physical Design using Synopsys ICC2, starRC, Primetime and synthesis using DC.
Education
Bachelor of Engineering
(4 years)
Qualifications
Digital Design Methodology
Maven Silicon
2019
Digital design methodology concepts and Verilog.
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