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$50 USD / hour
Flag of UNITED STATES
$50 USD / hour
It's currently 12:29 AM here
Joined March 13, 2012
0 Recommendations

Dan W.

@Dogbert256

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$50 USD / hour
Flag of UNITED STATES
$50 USD / hour
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Electrical Engineer

Elite, motivated Electrical Engineer with a very broad range of education and experience in the field of electronics. Design of virtually any type of analog and/or digital circuitry, including processor based designs, high accuracy data acquisition, and instrumentation and control electronics. Specifications development, component selection, BOM, documentation, and technical writing. Schematic capture, PCB layout, and rapid prototyping. PCB fabrication using Advanced Circuits, Inc. ([login to view URL]). SMT soldering and assembly. Small production runs courtesy of Vital Systems, Inc. ([login to view URL]). Embedded programming in Assembler and C. High level programming and data analysis using Matlab. Long term project support available. Specializing in designs to meet harsh industrial environmental requirements, manufacturability and testability targets, with the goal of high reliability and reasonable cost. Summary of Services Processor based embedded systems design and development; Analog and digital electronics design; Power supply circuit design; CMOS digital integrated circuit design; Professional PCB layout and fabrication; Firmware development (Assembler and C); High level programming (Matlab and other languages); Relevant Experience and Research Areas Applied Numerical Methods; System Identification; Embedded Microcontroller Systems; Digital Signal Processing; Fault Tolerant Design; CMOS Digital IC Design; Adaptive Control; Neural Networks; Summary of Qualifications BSEE, MEEE, University of Idaho; Post graduate GPA = 3.96 / 4.00; Registered EIT in Idaho and California; Additional Information Member US Chess Federation (highest rating = Expert). Previous member of Boise Chess Club; winner 1992, 1994, 1995 Boise Chess Club Championship; winner 1991, 1994 Boise Open Chess Tournament.

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Portfolio

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Experience

Electronics Design Engineer

Electron Volt Research and Development (Sole Proprietorship)
Feb 2012 - May 2012 (3 months, 1 day)
550 W. Plumb Ln, Ste B #254, Reno, NV 89509. Primarily involved in electronics design, component selection, PSPICE analysis, schematics, BOM, PCB layout, documentation, purchasing, fabrication, and test/validation of electronic products for clients. Specializing in designs to meet harsh industrial environmental requirements, manufacturability and testability targets, with the goal of high reliability and reasonable cost.

Product Development Engineer

Sustainable Energy Solutions
Oct 2010 - Jan 2012 (1 year, 3 months)
620 S. 18th Street, Sparks, NV 89431. Embedded electronics development for a local renewable energy start-up company, including specifications development, electronics design, component selection, PSPICE analysis, signal integrity, schematics, BOM, PCB layout, documentation, purchasing, fabrication, test/validation, and firmware development.

Electronics Design Engineer

Electron Volt Research and Development (Sole Proprietorship)
Jul 2008 - Sep 2010 (2 years, 2 months)
550 W. Plumb Ln, Ste B #254, Reno, NV 89509. Primarily involved in electronics design, component selection, PSPICE analysis, schematics, BOM, PCB layout, documentation, purchasing, fabrication, and test/validation of electronic products for clients. Specializing in designs to meet harsh industrial environmental requirements, manufacturability and testability targets, with the goal of high reliability and reasonable cost.

Education

Master of Engineering in Electrical Engineering

University of Idaho, 1993 - 1995
(2 years)

Bachelor of Science in Electrical Engineering

University of Idaho, 1980 - 1987
(7 years)

Qualifications

Engineer-in-Training

Board of Professional Engineers and Professional Land Surveyors
1987
Registered EIT in Idaho and California

Publications

Dasgupta-Huang Optimal Bounding Ellipsoid G[Z] Identification with Loop-in-System

University of Idaho
Digest of LACR (Laboratory for Advanced Communications Research)

Adaptive Neural Network Design Investigation using a Content Addressable Parallel Processor

University of Idaho
Digest of LACR (Laboratory for Advanced Communications Research)

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