Can you please provide a reference to the stepper motor datasheet, It will help in providing a better Bid estimate.
Currently the Bid is for providing a verilog module with the following interface
module controller (
input steps,
input frequency,
input input_valid,
input clk,
input rst,
input ref_clk, //???
output pwm,
output pwn_valid
)
Note: The interface will change depending on the interface required by the motor..
The deliverable's will contain the following.
1> Verilog Code.
2> Functional testbench and testcases.
3> Documentation.
4> Initial Synthesis script/Synthesis results.