An PSK (BPSK, QPSK,8-PSK) modulator/ demodulator for the ARTIX7-200 FPGA is needed

A (PSK) modulator/ demodulator for the ARTIX7-200 platform is needed. This project is a mere test for the abilities of the bidder. Several Add-On projects will follow. An PSK (BPSK, QPSK, OQPSK, 8-PSK) modulator/ demodulator for the ARTIX7-200 platform is needed. The PSK modulator must have a sampling rate selection between 1ksps-400 MSPS, The PSK demodulator must have a sampling rate selection between 1ksps-200 MSPS,(100 MSPS for BPSK) The developer will develop a PSK (BPSK, QPSK,OQPSK,8-PSK) modulator/ demodulator core . The demodulator core must perform all the carrier and clock recovery mechanisms (costas loop etc.) The PSK modulator will be generate 12 bit I&Q signals and will feed the signals to the demodulator. The Input to the modulator should be a PRBS sequence. The output of the demodulator should be feed to the PRBS Sequence decoder. ( the demodulator should indicate a LOCK) This project is a mere test for the abilities of the [login to view URL] are aware that this design can be realized by using Mathworks and Vivado HLS reference designs. If the bidder is sucessfull, we will ask for; A pulse shaping Filter,(TX,RX) A Viterbi decoder(an existing one), Sync Word Insertion, Detection, Reduced Rate FFT, BER count, SNR estimation blocks to be added by the bidder to the existing project for an extra fee.