Coding in SystemVerilog and UVM

Closed Posted Jan 25, 2013 Paid on delivery
Closed

Occasional Verilog or System Verilog code writing. For example, monitors, drivers, agents or small testbenches

Electrical Engineering Engineering Verilog / VHDL

Project ID: #4175263

About the project

13 proposals Remote project Active Mar 3, 2013

13 freelancers are bidding on average $850/hour for this job

MikroStar

hi, i can help.

$1800 USD / hour
(38 Reviews)
6.0
ahmedmohamed85

Dear sir, I have more than 5 years experience in hdl programming and testbench writing

$750 USD / hour
(21 Reviews)
5.5
iZoneFreelancer

Hi, Highly experienced in SV and UVM methodology for vetification. Lets discuss the project... More on PM.

$750 USD / hour
(3 Reviews)
2.9
aki542

Hi,I can help u.

$750 USD / hour
(1 Review)
1.0
haider1515

Hello, I have made single Board microComputer In my FYP.

$750 USD / hour
(0 Reviews)
0.0
juanzaragoza

Creo que puedo ayudarte. Estudio ingenieria electronica y he programado varias FPGA en VHDL para diferentes trabajos. Espero que me contactes.

$750 USD / hour
(0 Reviews)
0.0
krunal75777

Hi, I have more then 1.5 year experience in System Verilog as well in methodology like UVM,OVM. Can do it very easily. Give me your requirement.

$750 USD / hour
(0 Reviews)
0.0
emsalazarb

I'm an senior electronic engineer with more than seven years of experience working with FPGAs, HDLs, Digital Design, DSP, embedded, ... I have worked as a R&D engineer designing equipment for RF microwave using soft More

$1000 USD / hour
(0 Reviews)
0.0
kkkumaran

i am working as a vlsi engineer. i am good in verilog.....

$750 USD / hour
(0 Reviews)
0.0
goodperlcoder

The great works for me. I learned it in the univercity and I like this coding time-by-time,

$750 USD / hour
(2 Reviews)
0.8
kamranbabar687

Hi, Please see the PMB

$750 USD / hour
(0 Reviews)
0.0
dhruva1705

i have good expertise in chip verification. i am very comfortable with languages like verilog, system verilog. looking forward to hear from you soon :)

$750 USD / hour
(0 Reviews)
0.0
amanguptalibra29

Have 12+ years of experience in handling Verilog/ System Verilog Verification testbench development . Can I be of any help here ?

$750 USD / hour
(0 Reviews)
0.0