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    2,773 fpga outsource jobs found, pricing in CAD

    ...i need a simple program that can calculate time (using hight precision timer, better in micro seconds) between 2 external triggers. Here can be useed FPGA Hardware for example (personaly i prefere FPGA for such task) Frequency range from 0,1 to 100 Hz to be tested. i have programm already done (see attachement), on my laptop i got only value for frequency

    $48 (Avg Bid)
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    4 bids

    The project goal is the implementation of a Verilog module to interface a high-speed ADC (250MSps) using DDR. The IO/delay shall be dynamically adjusted after reset thru a test pattern match using a test mode of the ADC. As part of the project a simulation test bench needs to be set-up to verify proper function of the interface.

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    I have a de1-soc fpga board ([login to view URL]) for the detail. currently i have difficulty id generating code for image processing for my image. I have a completed matlab code that include the image and filtering kernel. I need the code to run into my fpga board.

    $47 (Avg Bid)
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    1 bids

    We're looking for someone with experience is sending data from an FPGA to a PC via a FT601 chip (made by FTDI) and saving the data to a binary file on the PC side.

    $53 / hr (Avg Bid)
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    an expert on FPGA and Verilog should bid only...

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    12 bids

    FPGA based VHDL code of control system device, the design should be handwritten, not generating code. The FPGA design must have the std logic data type of the inputs and the outputs and S-Fixed numbers of the entire control design

    $154 (Avg Bid)
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    FPGA based VHDL code of control system device, the design should be handwritten, not generating code. The FPGA design must have the std logic data type of the inputs and the outputs and S-Fixed numbers of the entire control design.

    $221 (Avg Bid)
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    Due to a lack of time we ask someone who is good at WordPress to prepare the website for delivery.

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    77 bids

    Using Altera DE1-SoC FPGA board, I want you to write a code which can do FFT of the provided signal using Quartus II and Modelsim.

    $484 (Avg Bid)
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    8 bids

    ...(c-9896) to drew the black white picture on paper First, get the picture and manipulate it to make black and white Second, convert the picture to hex decimal and upload it to fpga ( nexys 4 ddr) using matlab Third, control the robot arm to get the pen and drew the picture. the expectation of the project is to have the following: - the required codes

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    The brightness measurement with help of PMODALS sensor ([login to view URL] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([login to view URL]) is to be used, which takes over the control. The

    $297 (Avg Bid)
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    Project for Jin C. 16 hours left

    Hi Jin, I noticed your work on VHDL/FPGA related projects from your bio. I was wondering if you would like to work on a small project that is based on a FIFO implementation of a FM radio in VHDL. A C++ version of the code is already written, as well as a FIFO and Divider helper files in VHDL. We can discuss any details over chat.

    $213 (Avg Bid)
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    Hi Ahmed, I noticed your work on VHDL/FPGA related projects from your bio. I was wondering if you would like to work on a small project that is based on a FIFO implementation of a FM radio in VHDL. A C++ version of the code is already written, as well as a FIFO and Divider helper files in VHDL. We can discuss any details over chat.

    $267 (Avg Bid)
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    1 bids

    Hi Ahmed, I noticed your work on VHDL/FPGA related projects from your bio. I was wondering if you would like to work on a small project that is based on a FIFO implementation of a FM radio in VHDL. A C++ version of the code is already written, as well as a FIFO and Divider helper files in VHDL. We can discuss any details over chat.

    $213 (Avg Bid)
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    1 bids

    Project target is to have a FPGA to communicate with two I2S codecs and to provide a SPI slave connection conveying the I2S data to and from a local MCU. Testing scripts and test timings for the Altera Quartus environment are required. For the proper testing of the project deliverables, test scripts and test timings need to be created and relevant

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    This is a long term project to teach and train a software engineer about advanced Electronics, PCB design and FPGA programming. This needs between 3 and 5 hours of face to face (online video conferencing) each week and excellent communication in English. So the payments are weekly as we have the online conferecing calls. The details of what will be

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    Trophy icon Engineer consultant Business Card 4 days left

    ...have any logo, a simple one is appreciated or also a simple standard design that represent my work is enough (google image keyword: circuit, pcb, electronic design, firmware, fpga, power electronics ) I would like to have a list of skills that I have on the business card, they are: Power Electronics, Hardware Design, Firmware, Digital Control, Altium

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    We are energy brokers based in the UK .We work with all the major energy suppliers and would like to outsource the complete process to an experience agency dealing in the UK gas and electricity [login to view URL] are happy to split 50:50 on the total commission and we would like to hear from experience call centers who are have prior experience in this sector

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    I want to implement YoloV2/V3 custom object detection on FPGA. I have my trained yolo custom object detection files(.cfg and .weights) using darknet and now i want to implement yolo using this files on Xilinx FPGA. I am using ZCU102 and PYNQ evaluation boards with me.

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    I need some IPs(PHY/MAC...) for digital communication systems.

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    I Need Programmer For FPGA Board & Software Development.

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    1- I need someone to design a fully-digital, hardware-based keyboard encoder for a 16-key (4×4) matrix keyboard. 2- The design is to be implemented using an FPGA and verified by both simulation and physical implementation using a development board. 3- You should have Development boards, design software and encoder hardware 4- Separate documents will

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    ...explaining different aspects of that algorithm. - Explain FPGA developers about Blockchain, cryptocurrency, how crypto-mining works. How to mine that particular algorithm. - Work with them and help them understand how crypto-mining works. And how to mine that perticular algorithm. - Support FPGA developers throughout development. - Must be fluent in

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    FPGA mining hardware - Xiling FPGA - Nexys Video - Can be leveraged from open source bitcoin miner code. - Based on Verilog. - Provide source code, constraints and full recipe for synthesis, implementation and bitstream generation - Connectivity via JTAG to the host (via USB). May consider UART instead, but as a less desirable solution. Mining software:

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    I have a VHDL source for the Altera EP3C25F256C8 FPGA design. I like an expert to setup the timing and fitting parameters to give the design optimum performance. I use Quartus II software version 8.1

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    ...distance measurement with help of MB1010 ultrasonic distance sensor ( [login to view URL] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core ([login to view URL]) is to be used, which takes over the control

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    Your first task is create an EAGLE 7.x library (a symbol and a footprint) for the part (ORT42G5-3BM484C) for it. Part info: Please refer to the attached datasheet file. YOU MUST PROVIDE complete EAGLE 7.x library file. Second task is create an EAGLE 7.x schematic for a breakout board. You can refer the evaluation board schematic. Evaluation board schematic: Please refer to the attached schematic ...

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    Details are included in the preliminary document. In short, we would lik...separate bids. I may even be posting them as time and material. NOTE: The intention is to eventually take this to a custom SOC implementation with the "link sharing" portion being FPGA programmed in and the rest (SPROC(s) in the doc) running on an ARM with a mcro linux kernel.

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    Looking for someone how has knowledge in FPGA programming hardware and software.

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    Using ModelSim or Quartus II for solving some problems i am working on

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    Working on 3 SEO projects currently that need attention using Rabbit SEO. Must have previous experience with program Rabbit SEO, knowledgeable in white hat SEO tactics and speak fluent English over the phone or through Skype. Small project completed first to see if you qualify for 2 larger projects that may be ongoing 15 hours per week approximately. I am fluent and experienced in SEO myself bu ju...

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    The brightness measurement with help of PMODALS sensor ([login to view URL] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([login to view URL]) is to be used, which takes over the control. The

    $240 (Avg Bid)
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    9 bids

    In this project, a simple VGA (Video Graphics Array) controller shall be implemented using an FPGA Basys3. The VGA controller should be able to display images with a resolution of 640X480 pixels. Furthermore, it should be possible to select between two different images, depending on the position of switch SW1. Document description of whole design

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    We are an export based company and want to be in touch with our CRM customers or genuine cus...exceed 2000 ie 4000-6000 emails every month, we want confirmed delivery of every email. We dont want to get in the hassle of buying a server or sending mail etc but want to outsource the whole project to a single company. Do read carefully before responding.

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    FPGA based VHDL code of control system device, the design should be handwritten, not generating code. The FPGA design must have the std logic data type of the inputs and the outputs and S-Fixed numbers of the entire control design.

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    This project consists to port some c code (around 50 lines) to Verilog in order to run on a FPGA. Output of the contest Verilog .v source file equivalent of verilog.c testbench .v file equivalent to doSimulation() You can run the C code with "gcc main.c && ./[login to view URL]" Elements to select the winning bidder: - Partial screenshot of the implementation

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    We have multiple campaigns which we are planning to outsource to interested candidates who want to work with us for longer time,as well as to [login to view URL] are genuine paymaster in the [login to view URL] please do not contact we wanrt direct call center from Phillipines and Kolkata to bid.

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    We have multiple campaigns which we are planning to outsource to interested candidates who want to work with us for longer time,as well as to [login to view URL] are genuine paymaster in the [login to view URL] please do not contact we wanrt direct call center from Phillipines and Kolkata to bid.

    $139 (Avg Bid)
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    20 bids

    Hello, We need two resources of Java Developer with Ninja Framework for the tenure of 3 months for one of our Gurgaon Based clients Exp Required: 3+ Yrs

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    We are looking for Delhi NCR Based IT Companies who can outsource their 3+ years experienced Java Developers for the tenure of 3 months to one of our Gurgaon Based Client. Skills Required: Java,Spring,Database, Mircoservices. (Removed by Freelancer.com Admin)

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    hi i have one ( php, html5 css work) and android project work ( i wan tto work locally with them as this is outsource project) In both project we have to do editing and modification we have to not create from scratch rest details i will tell in chats if any one interested in any of them please let me know siince i am outsourcing the budget will

    $39 - $116
    Sealed
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    24 bids

    We are looking for Delhi NCR Based IT Companies who can outsource their 3+ years experienced Java Developers for the tenure of 3 months to one of our Gurgaon Based Client. Skills Required: Java,Spring,Database, Mircoservices. (Removed by Freelancer.com Admin)

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    Milestone 3: Digital Modulator, Error Block and Digital Demodulator Information often has to be transmitted from one location to another such that it is correctly received despite being sent through a noisy environment that could introduce errors. To achieve this a Digital Modulation Scheme can be used where specific modulation I & Q waveforms are then used to represent each of the four possib...

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    hi need wordpress developer , who can edit theme also (NO Indians please), as this is outsource project

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    Sealed NDA
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    Hi, I need a quick prototype of an Artix-7 fpga that makes a PCIe to sd card controller (SD host controller/SD bus). Objective is to have a fpga card (working on pcie screamer) recognized as a SD/MMC card reader under windows, I need Windows to recognize/be able to install the windows built-in sd card drivers for the card. I don’t need it to actually

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    Contract for outsourcing IT work and revenue share with a foreign company

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    -Tools:Altera Quartus,Modelsim and FPGA. -This Project is divided to two parts:- [login to view URL] and implement a 32 bit architecture pipelined CPU with a single bus for a MIPS computer. Found in figure 1 is a top level view of a single core single bus MIPS CPU. Use Quartus to design the list of components found below in Verilog HDL. 1- Register File (16x

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